The present invention relates to a semiconductor integrated circuit device and to a method of manufacture thereof; and more, particularly, the invention relates to a structure wherein a conductor film made of a metal or an alloy containing Ru (ruthenium) as a principal component is formed inside of a hole (redess) which has been formed in an insulating film with a high aspect ratio, and to a technique effective when adapted to the method of manufacture of the structure.
Japanese Patent Application Laid-Open Hei 8(1996)-78396 (Tokashiki, et al.) discloses a technique for the manufacture of a semiconductor device which comprises dry etching of an Ru oxide by using a plasma formed from a gas mixture containing at least one substance selected from the group consisting of halogen gases, containing at least one of fluorine gas, chlorine gas, bromine gas and iodine gas, and hydrogen halides, and an oxygen gas or an ozone gas.
Japanese Patent Application Laid-Open No. Hei 11(1999)-50163 (Shindo, et al.) discloses a process for preparing a high purity ruthenium material for thin film formation, which comprises blowing an ozone-containing gas into a crude ruthenium powder while adding thereto hypochlorous acid, thereby forming ruthenium tetraoxide, allowing the resulting ruthenium tetraoxide to absorb to a hydrochloric acid solution, evaporating the resulting solution to dryness and roasting the resulting RuOCl3 crystals in a hydrogen atmosphere.
Rainer Loessberg and Ulrich Mueller disclose in xe2x80x9cZeitschrift Fuer Naturforschung, Section B, Chemical Sciences, Vol, 36B, No.3, 1981, pp395xe2x80x9d, a process for preparing pure ruthenium tetraoxide by reacting ruthenium and ozone at room temperature. The following is the outline of the process: xe2x80x9cRUO4 can be synthesized from an Ru metal and zone at room temperature. This process makes it possible to prepare pure RuO4 directly without causing a problem of separation of water which occurs in the standard preparing process. In the well known synthesizing process of an Ru (VIII) oxide, an aqueous solution of a ruthenium compound (such as RuCl3, RUO2 or RuO4) is mixed with an oxidizing agent (such as BrO3xe2x88x92, IO4xe2x88x92 or MnO4xe2x88x92), followed by distillation or extraction of the resulting RUO4. Then, a subsequent operation for separating water present in the system, which is accompanied with some difficulty, is required, which lowers the yield. We have found a simple synthesis process of reacting metal ruthenium with ozone at room temperature. Ozone must be free of oxygen, because unless so, the reaction becomes markedly slow (presumably because of immobilization owing to the formation of a lower bxide of ruthenium). For this purpose, a U-tube for feeding an O2/O3 mixture from an ozonizer is filled in advance with dried silica gel and it is maintained at xe2x88x9278xc2x0 C. The silica gel becomes dark blue when O3 is adsorbed thereto, but O2 is not adsorbed to it. The condenser is gradually distanced from the U-tube and dry nitrogen is allowed to pass therethrough slowly, whereby ozone is released. An N2/O3 mixed gas is introduced into the tube of about 30 cm long and 3 cm wide having therein finely dispersed Ru powders (particle size: 60 xcexcm) uniformly. The RuO4 thus formed is carried by a gas flow and is separated as gold crystals in the condenser of xe2x88x9278xc2x0 C. For preventing contamination by water, the apparatus is filled with completely dried nitrogen from the beginning of the reaction. Oxygen to be introduced into the ozonizer must be dry so that a drying tube filled with P2O5 is connected with the inlet of the separating condenser. The Ru filled in the tube is converted at a stoichiometric ratio so that an excess amount of O3 is required. The same amount of RuO4 is available when the time spent is the samexe2x80x9d.
Watari, et al. in xe2x80x9cJournal of Nuclear Science and Technology, 28, No. 6(1986), pp 493-500xe2x80x9d, describe the volatility of an oxide of Ru, which is one of platinum metals produced by nuclear fission, from the viewpoint of spent fuel reprocessing.
As a countermeasure against a decrease in a storage charge amount owing to microfabrication of a memory cell in large-capacity DRAMs (Dynamic Random Access Memories) after a DRAM of 256 Mbit, the constitution of a capacitor insulating film of an information storage capacitor made from a high dielectric material, such as BST ((Ba, Sr) TiO3), which has a dielectric constant of 50 or greater and is an ABO3 type double oxide, that is, a perovskite type double oxide, or even from a ferroelectric substance, which has a dielectric constant of 100 or greater and contains a perovskite crystal structure, such as PZT (PbZrxTi1xe2x88x92x,O3), PLT (PbLaxTi1xe2x88x92,O3), PLZT, PbTiO3, SrTiO3 or BaTiO3 , is under investigation.
When a capacitor insulating film is formed from a high dielectric or ferroelectric material as in the conventional manner, conductor films for the electrode between which the high dielectric or ferroelectric material is sandwiched must be constituted from a material having a high affinity with the material. As such an electrode material, platinum metals typified by Ru and Os and conductive oxides thereof have been investigated as a candidate, and, particularly, the introduction of Ru is under way.
When Ru is used as a lower electrode material of an information storage capacitor, a step is required for forming a hole (recess) in a thick silicon oxide film, depositing an Ru film over the silicon oxide film and inside (on the side walls and bottom surface) of the hole, and etching away a portion of the Ru film over the silicon oxide film, thereby forming a lower electrode of Ru on the side walls and bottom surface of the hole.
In the conventional ion assist plasma etching using oxygen as a main etching gas, however, removal the Ru film from the upper surface of the silicon oxide film without etching away the Ru film inside of the hole is difficult and this becomes a large cause for disturbing the satisfactory formation of an information storage capacitor using Ru as a lower electrode material.
An object of the present invention is therefore to provide an etching technique which is capable of removing an Ru film outside of a hole having a high aspect ratio without etching away the Ru film inside the hole.
Another object of the present invention is to provide a technique for forming a lower electrode of an information storage capacitor inside of a hole having a markedly high aspect ratio.
The above-described and other objects, and novel features of the present invention will be apparent from the description herein and the accompanying drawings.
Among the features disclosed in the present application, typical ones will be summarized simply in the following items.
1. A manufacturing method of a semiconductor integrated circuit device according to the present invention, which comprises:
(a) forming, over the first main surface of a wafer, a first conductor film made of a metal or an alloy containing ruthenium or osmium as a principal component; and
(b) subjecting the first conductor film to isotropic dry etching in a gas atmosphere containing an ozone gas.
2. A manufacturing method of a semiconductor integrated circuit device according to the present invention, which comprises:
(a) forming, over the first main surface of a wafer, a first conductor film made of a metal or an alloy containing ruthenium or osmium as a principal component, and
(b) subjecting the first conductor film to non-plasma dry etching in a gas atmosphere containing an ozone gas.
3. A manufacturing method of a semiconductor integrated circuit device according to the present invention, which comprises:
(a) forming, over the first main surface of a wafer, a first conductor film made of a metal or an alloy containing ruthenium or osmium as a principal component,
(b) forming a first resist pattern over the first main surface of the wafer having the first conductor film formed thereover, and
(c) subjecting the first conductor film to isotropic dry etching with the first resist pattern as a etching mask.
4. A manufacturing method of a semiconductor integrated circuit device according to the present invention, which comprises:
(a) forming, over the first main surface of a wafer, a first conductor film made of a metal or an alloy containing ruthenium or osmium as a principal component,
(b) forming a first resist pattern over the first main surface of the wafer having the first conductor film formed thereover,
(c) subjecting the first conductor film to isotropic dry etching while having the first resist pattern over the first main surface of the wafer, and
(d) removing the first resist pattern after the step (c).
5. A manufacturing method of a semiconductor integrated circuit device according to the present invention, which comprises:
(a) forming, over the first main surface of a wafer having a first recess, a first conductor film made of a metal made of a metal or an alloy containing ruthenium or osmium as a principal component to cover the first main surface outside the recess and the bottom surface and side walls of the recess and not to embed the recess, thereby leaving the recess having the side walls and bottom surface covered with the first conductor film,
(b) forming a photoresist pattern to cover at least the upper end portion of the recess, and
(c) subjecting the first main surface of the wafer to dry etching with the photoresist pattern as an etching mask in a gas atmosphere containing an ozone gas, thereby removing the first conductor film from the first main surface outside the recess.
6. A manufacturing method of a semiconductor integrated circuit device according to the present invention, which comprises:
(a) forming, over the first main surface of a wafer having a first recess, a first conductor film made of a metal to cover the first main surface outside the recess and the bottom surface and side walls of the recess and not to embed the recess, thereby leaving the recess having the side walls and bottom surface covered with the first conductor film,
(b) forming a photoresisr pattern to cover at least the upper end portion of the recess,
(c) subjecting, in the presence of the photoresist pattern, the first main surface of the wafer to dry etching in a gas atmosphere containing an ozone gas, thereby removing the first conductor film fxom the first main surface outside the recess, and
(d) removing the photoresist pattern after the step (c).
7. A manufacturing method of a semiconductor integrated circuit device according to the present invention, which comprises:
(a) forming, over the first main surface of a wafer, a first conductor film made of a metal or an alloy containing ruthenium or osmium as a principal component,
(b) forming a first resist pattern over the first main surface of the wafer having the first conductor film formed thereover, and
(c) dry etching the first conductor film at a selectivity of 4 or greater relative to a resist, with the first resist pattern as an etching mask.
8. A manufacturing method of a semiconductor integrated circuit device according to the present invention, which comprises:
(a) forming, over the first main surface of a wafer, a first conductor film made of a metal or an alloy containing ruthenium or osmium as a principal component,
(b) forming a first resist pattern over the first main surface of the wafer having the first conductor film formed thereover,
(c) dry etching, in the presence of the first resist pattern, the first conductor film at a selectivity of 4 or greater relative to a resist, and
(d) removing the photoresist pattern after the step (c).
9. A manufacturing method of a semiconductor integrated circuit device according to the present invention, which comprises:
(a) forming, over the first main surface of a wafer, a first conductor film made of a metal or an alloy containing ruthenium or osmium as a principal component,
(b) forming a first resist pattern over the first main surface of the wafer having the first conductor film formed thereover, and
(c) dry etching the first conductor film at a selectivity of 0.5 or greater relative to a resist, with the first resist pattern as an etching mask.
10. A manufacturing method of a semiconductor integrated circuit device according to the present invention, which comprises:
(a) forming, over the first main surface of a wafer, a first conductor film made of a metal or an alloy containing ruthenium or osmium as a principal component,
(b) forming a first resist pattern over the first main surface of the wafer having the first conductor film formed thereover,
(c) subjecting the first conductor film to chemical dry etching at a selectivity of 0.5 or greater relative to a resist, with the first resist pattern as an etching mask, and
(d) removing the photoresist pattern after the step (c).
11. A manufacturing method of a semiconductor integrated circuit device according to the present invention, which comprises:
(a) opening a first recess in a first insulating film over the first main surface of a wafer,
(b) forming a first conductor film made of a metal or an alloy containing ruthenium or osmium as a principal component to cover the first main surface outside the first recess and the bottom surface and side walls of the first recess and not to embed the first recess, thereby leaving the recess having the side walls and bottom surface covered with the first conductor film,
(c) forming a photoresist film pattern to fill the remaining inside portion of the recess,
(d) subjecting, in the presence of the photoresist film pattern, the first main surface to dry etching in a gas atmosphere containing an ozone gas, thereby removing the first conductor film from the outside of the recess,
(e) removing the photoresist film pattern after the step (d), and
(f) forming a capacitor insulating film containing a perovskite high dielectric substance or ferroelectric substance as a principal component inside of the first recess from which the photoresist film pattern has been removed.
12. A manufacturing method of a semiconductor integrated circuit device according to the present invention, which comprises:
(a) forming, over the first main surface of a water, a first conductor film made of a metal or an alloy containing ruthenium or osmium as a principal component,
(b) forming a first resist pattern over the first main surface of the wafer having the first conductor film formed thereover, and
(c) subjecting the first conductor film to non-plasma dry etching with the first resist pattern as an etching mask.
13. A semiconductor integrated circuit device according to the present invention, which comprises:
(a) a semiconductor integrated circuit board having a first main surface,
(b) a first conductor film made of a metal or an alloy containing ruthenium or osmium as a principal component, or alloy thereof and formed over the first main surface, and
(c) a conductive oxide film formed over the first conductor film and containing a metal double oxide of ruthenium or osmium as a principal component, or a polymetal double oxide having the metal double dioxide as a main component.
14. A manufacturing method of a semiconductor integrated circuit device according to the present invention, which comprises:
(a) forming, over the first main surface of a wafer, a first conductor film made of a metal or an alloy containing ruthenium or osmium as a principal component,
(b) forming, over the first conductor film, a first conductive oxide film which contains a metal double oxide of ruthenium or osmium as a principal component, or a polymetal double oxide having the metal double dioxide as a main component,
(c) forming a first resist film pattern over the first conductive oxide film,
(d) subjecting the first conductive oxide film and first conductor film to anisotropic dry etching with the first resist film pattern as an etching mask, thereby forming a first conductor film pattern made of the first conductive oxide film and the first conductor film, and
(e) ashing the first resist film pattern over the first conductor film pattern in a gas atmosphere containing an ozone gas, thereby removing the first resist film.
15. A manufacturing method of a semiconductor integrated circuit device of the present invention, which comprises:
(a) forming, over the first main surface of a wafer, a first conductor film made of a metal or an alloy containing ruthenium or osmium as a principal component, or alloy thereof and
(b) etching the first conductor film by dry etching at an etching rate of 200 nm/min or greater.
16. A manufacturing method of a semiconductor integrated circuit device of the present invention, which comprises:
(a) forming, over the first main surface of a wafer, a first region from which a silicon member has been exposed and a second region from which no silicon member has been exposed,
(b) forming, over the first main surface of the wafer which has been divided into the first and second regions, a first conductor film made of a metal or an alloy containing ruthenium or osmium as a principal component, or alloy thereof,
(c) heat treating the first main surface having the first conductor film formed thereover to convert at least a portion of the first conductor film,over the first region into a silicide,
(d) dry etching the heat-treated first main surface in a gas atmosphere containing an ozone gas, thereby leaving the silicide-formed portion and removing the first conductor film other than the silicide-formed portion.
17. A manufacturing method of a semiconductor integrated circuit device according to the present invention, which comprises:
(a) forming a first recess in a first insulating film over the first main surface of a wafer, thereby exposing a silicon member of a first region on the bottom surface of the first recess,
(b) forming a first conductor film which is made of a metal or an alloy containing ruthenium or osmium as a principal component, or alloy thereof to cover at least the bottom surface of the first recess,
(c) heat treating the first main surface of the wafer having the first conductor film formed thereover to convert at least a portion of the first conductor film over the first region into a silicide, and
(d) subjecting the heat-treated first main surface to dry etching in a gas atmosphere containing an ozone gas, thereby leaving the silicide-formed portion and removing the first conductor film other than the silicide-formed portion.
18. A manufacturing method of a semiconductor integrated circuit device according to the present invention, which comprises:
(a) forming a first conductor film over the first main surface of a wafer having therein a first recess with an aspect ratio of 5 or greater so as to cover the first main surface outside the recess and bottom surface and side walls of the recess with the first conductor film and not to embed the recess therewith, thereby leaving the recess having side walls and bottom surface made of the first conductor film and having an aspect ratio of 10 or greater, and
(b) subjecting the first main surface of the wafer to anisotropic dry etching, thereby removing the first film from the first main surface outside the recess without exposing the bottom surface of the recess lying under the first conductor film.
19. A manufacturing method of a semiconductor integrated circuit device according to the present invention, which comprises:
(a) opening, in a first insulating film over the first main surface of a wafer, a first recess having an aspect ratio of 5 or greater,
(b) forming a first conductor film which is made of a metal or an alloy containing ruthenium or osmium as a principal component, or alloy thereof so as to cover the first main surface outside the first recess and bottom surface and side walls of the first recess with the first conductor film and not to embed therewith the first recess, thereby leaving the recess having side walls and bottom surface made of the first conductor film and having an aspect ratio of 10 or greater,
(c) subjecting the first main surface to anisotropic dry etching while exposing the first conductor film inside of the first recess, thereby removing the first conductor film from the outside of the first recess, and
(d) forming, inside of the first recess, a capacitor insulating film containing a non-perovskite high dielectric substance as a principal component after the step (c).
20. A manufacturing method of a semiconductor integrated circuit device according to the present invention which comprises:
(a) forming, in a first insulating film over the first main surface of a wafer, a first recess having an aspect ratio of for greater,
(b) forming a first conductor film which is made of a metal or an alloy containing ruthenium or osmium as a principal component, or alloy thereof so as to cover the first main surface outside the first recess and bottom surface and side walls of the firstrecess with the first conductor film and not to embed therewith the first recess, thereby leaving the recess having side walls and bottom surface made of the first conductor film and having an aspect ratio of 10 or greater,
(c) subjecting the first main surface to anisotropic dry etching while not covering the first recess with an etching mask, thereby removing the first conductor film from the outside of the first recess, and
(d) forming, inside of the first recess, a capacitor insulating film containing a non-perovskite high dielectric substance as a principal component after the step (c).
21. A semiconductor integrated circuit device according to the present invention, which comprises:
(a) an integrated circuit board having a semiconductor surface over a first main surface,
(b) a first insulating film formed over the first main surface, and
(c) a first recess opened in the first insulating film and having an aspect ratio of 12 or greater.
22. A manufacturing method of a semiconductor integrated circuit device according to the present invention, which comprises:
(a) forming a first inorganic member film over a first insulating film over the first main surface of a wafer,
(b) forming a first photoresist film over the first inorganic member film,
(c) patterning the first photoresist film to form a first resist film pattern,
(d) subjecting the first main surface to first dry etching treatment in the presence of the first resist film pattern, thereby forming first and second openings in the first organic member film, and
(e) subjecting the first main surface to second dry etching treatment in the presence of the first inorganic member film having therein the first and second openings formed, thereby forming first and second recesses having an aspect ratio of 12 or greater in the first insulating film.
23. A semiconductor integrated circuit device according to the present invention, which comprises:
(a) forming, over the first main surface of a wafer having a first recess, a first conductor film which is made of a metal or an alloy containing ruthenium or osmium as a principal component to cover the first main surface outside the recess and the bottom surface and side walls of the recess with the first conductor film and not to embed therewith the recess, thereby leaving the recess having side walls and bottom surface covered with the first conductor film,
(b) forming a photoresist pattern to cover the inside of the recess, and
(c) etching the first main surface of the wafer with the photoresist pattern as an etching mask, and
(d) after the step (c), removing the photoresist pattern by treating it in an ozone-containing gas phase.
24. A manufacturing method of a semiconductor integrated circuit device according to the present invention, which comprises:
(a) forming, over the first main surface of a wafer, a first conductor film made of a metal or an alloy containing ruthenium or osmium as a principal component, or alloy thereof,
(b) forming a photoresist pattern to cover the first main surface,
(c) etching the first main surface of the wafer with the photoresist pattern as an etching mask, and
(d) removing the photoresist pattern by treating it in an ozone-containing gas phase at 180 to 280xc2x0 C. after the step (c).
25. A manufacturing method of a semiconductor integrated circuit device according to the present invention, which comprises:
(a) forming, over the first main surface of a wafer having a first recess, a first conductor film which is made of a metal or an alloy containing ruthenium or osmium as a principal component, or alloy thereof so as to cover the first main surface outside the recess and the bottom surface and side walls of the recess with the first conductor film and not to embed therewith the recess, thereby leaving the recess having the side wails and bottom surface covered with the first conductor film and having an aspect ratio of 5 or greater,
(b) forming a photoresist pattern to cover the inside of the recess, and
(c) etching the first main surface of the wafer with the photoresist pattern as an etching mask, and
(d) after the step (c), removing the photoresist pattern by treating it in a liquid phase.
26. A manufacturing method of a semiconductor integrated circuit device according to the present invention, which comprises:
(a) forming, over the first main surface of a wafer having a first recess, a first conductor film which is made of a metal or an alloy containing ruthenium or osmium as a principal component, or alloy thereof so as to cover the first main surface outside the recess and the bottom surface and side walls of the recess with the first conductor film and not to embed therewith the recess, thereby leaving the recess having the side walls and bottom surface covered with the first conductor film,
(b) embedding the inside of the recess with an organic coating film, and
(c) dry etching the.first main surface of the wafer in a gas atmosphere containing an ozone gas with the organic coating film as an etching mask, thereby removing the first conductor film over the first main surface outside the recess.
An outline of other features according to the present application will next be described in the following items.
1. A manufacturing method of a semiconductor integrated circuit device, which comprises:
(a) forming an insulating film over the main surface of a substrate and then forming a hole in the insulating film,
(b) forming, over the insulating film including the inside of the hole, a first conductor film containing ruthenium or osmium as a principal component to have a thickness within an extent not embedding the inside of the hole,
(c) embedding a photoresist film inside of the hole and dry etghing the photoresist film in an ozone-containing gas atmosphere with the photoresist film as an etching mask, thereby removing the first conductor film outside of the hole and leaving the first conductor film inside of the hole.
2. A manufacturing method of a semiconductor integrated circuit device as described above in 1, wherein the first conductor film contains ruthenium as a principal component.
3. A manufacturing method of a semiconductor integrated circuit device as described above in 1, which further comprises removing the photoresist film inside of the hole after the step (c).
4. A manufacturing method of a semiconductor integrated circuit device as described above in 1, wherein the first conductor film is dry etched by anisotropic dry etching.
5. A manufacturing method of a semiconductor integrated circuit device as described above in 1, wherein the first conductor film is dry etched by non-plasma dry etching.
6. A manufacturing method of a semiconductor integrated circuit device as described above in 1, wherein the first conductor film is dry etched at a temperature permitting the etching rate of the first conductor film to exceed an oxidation-induced film-thickness increasing rate.
7. A manufacturing method of a semiconductor integrated circuit device as described above in 1, wherein upon dry etching of the first conductor film, the temperature of the substrate is at least 25xc2x0 C. but not greater than 150xc2x0 C.
8. A manufacturing method of a semiconductor integrated circuit device as described above in 7, wherein upon dry etching of the first conductor film, the temperature of the substrate is at least 25xc2x0 C. but not greater than 110xc2x0 C.
9. A manufacturing method of a semiconductor integrated circuit device as described above in 1, wherein the ozone-containing gas is not exposed to ultraviolet rays.
10. A manufacturing method of a semiconductor integrated circuit device as described above in 1, wherein upon dry etching, the selectivity of the first conductor film relative to a resist is at least 20.
11. A manufacturing method of a semiconductor integrated circuit device as described above in 1, wherein upon dry-etching, the selectivity of the first conductor film relative to a resist is at least 100.
12. A manufacturing method of a semiconductor integrated circuit device as described above in 1, wherein the hofe having the first conductor film formed therein has an aspect ratio of 12 or less.
13. A manufacturing method of a semiconductor integrated circuit device as described above in 12, wherein the insulating film is made of a silicon oxide type insulating film and the hole is formed by dry etching with the photoresist film as an etching mask.
14. A manufacturing method of a semiconductor integrated circuit device, which comprises:
(a) forming an MISFET over the main surface of a substrate and forming a first insulating film over the MISFET,
(b) after formation of a first connecting hole in the first insulating film, forming a first plug inside of the first connecting hole to electrically connect the first plug and the MISFET,
(c) after formation of the second insulating film over the first insulating film, forming a hole in the second insulating film over the first connecting hole, thereby exposing the surface of the first plug from the bottom of the hole,
(d) forming, over the second insulating film including the inside of the hole, a first conductor film containing ruthenium or osmium as a principal component and having a thickness not so high as to embed the inside of the hole with it,
(e) embedding a photoresist film inside of the hole and then carry out dry etching with the photoresist film as an etching mask, thereby removing the first conductor film from the outside of the hole, and
(f) removing the photoresist film inside of the hole, thereby forming a capacitor electrode which is made of the first conductor film left inside of the hole and is to be electrically connected with the first plug.
15. A manufacturing method of a semiconductor integrated circuit device as described above in 14, wherein the first conductor film contains ruthenium as a principal component.
16. A manufacturing method of a semiconductor integrated circuit device as described above in 14, which further comprises forming, over the capacitor electrode, a capacitor insulating film of a capacitor constituting another part of the memory cell after the step (f).
17. A manufacturing method of a semiconductor integrated circuit device as described above in 16, wherein the capacitor insulating film has a dielectric constant of 50 or greater.
18. A manufacturing method of a semiconductor integrated circuit device as described above in 17, wherein the capacitor insulating film is made of a high dielectric or ferroelectric substance containing a perovskite type metal oxide as a principal component.
19. A manufacturing method of a semiconductor integrated circuit device as described above in 18, wherein the perovskite type metal oxide is BST.
20. A manufacturing method of a semiconductor integrated circuit device as described above in 17, wherein the holo having the first conductor film formed therein has an aspect ratio of 12 or less.
21. A manufacturing method of a semiconductor integrated circuit device as described above in 14, wherein dry etching of the first conductor film is isotropic dry etching.
22. A manufacturing method of a semiconductor integrated circuit device as described above in 14, wherein dry etching of the first conductor film is non-plasma dry etching.
23. A manufacturing method of a semiconductor integrated circuit device as described above in 14, wherein the first conductor film is dry etched at a temperature permitting the etching rate of the first conductor film to exceed an oxidation-induced film-thickness increasing rate.
24. A manufacturing method of a semiconductor integrated circuit device as described above in 14, wherein upon dry etching of the first conductor film, the temperature of the substrate is at least 25xc2x0 C. but not greater than 150xc2x0 C.
25. A manufacturing method of a semiconductor integrated circuit device as described above in 24, wherein upon dry etching of the first conductor film, the temperature of the substrate is at least 25xc2x0 C. but not greater than 110xc2x0 C.
26. A manufacturing method of a semiconductor integrated circuit device as described above in 14, wherein the ozone-containing gas is not exposed to ultraviolet rays.
27. A manufacturing method of a semiconductor integrated circuit device as described above in 14, wherein upon dry etching, the selectivity of the first conductor film relative to a resist is at least 20.
28. A manufacturing method of a semiconductor integrated circuit device as described above in 14, wherein upon dry etching, the selectivity of the first conductor film relative to a resist is at least 100.
29. A manufacturing method of a semiconductor integrated circuit device as described above in 20, wherein the second insulating film is made of a silicon oxide type insulating film and the hole is formed by dry etching with the photoresist film a s an etching mask.
30. A manufacturing method of a semiconductor integrated circuit device, which comprises:
(a) after the formation of an insulating film over the main surface of a substrate, forming a hole in the insulating film,
(b) forming, over the insulating film including the inside of the hole, a first conductor film having a thickness not so high as to embed the inside of the hole, thereby adjusting the aspect ratio of the hole to 12 or greater, and
(c) removing the first conductor film outside of the hole by ion assist dry etching in an oxygen-containing gas atmosphere, thereby leaving the first conductor film inside of the hole.
31. A manufacturing method of a semiconductor integrated circuit device as described above in 30, wherein the hole having the first conductor film formed therein has an aspect ratio of 20 or greater.
32. A manufacturing method of a semiconductor integrated circuit device as described above in 31, wherein the hole having the first conductor film formed therein has an aspect ratio of 30 or greater.
33. A manufacturing method of a semiconductor integrated circuit device as described above in 30, wherein the insulating film is made of a silicon oxide type insulating film and the hole is formed by dry etching with a hard mask which has been formed over the insulating film and its selectivity relative to a resist is greater than that of the silicon oxide type insulating filmxe2x80x94as an etching mask.
34. A manufacturing method of a semiconductor integrated circuit device as described above in 33, wherein the selectivity of the hard mask relative to a resist is 4 or greater.
35. A manufacturing method of a semiconductor integrated circuit device as described above in 33, wherein the hard mask is tungsten.
36. A manufacturing method of a semiconductor integrated circuit device, which comprises:
(a) forming an MISFET over the main surface of a substrate and forming a first insulating film over the MISFET,
(b) after formation of a first connecting hole in the first insulating film, forming a first plug inside of the first connecting hole, thereby electrically connecting the first plug with the MISFET,
(c) after formation of a second insulating film over the first insulating film, forming a hole in the second insulating film over the first connecting hole, thereby exposing the surface of the first plug from the bottom of the hole,
(d) forming, over the second insulating film including the inside of the hole, a first conductor film having a thickness not so high as to embed the inside of the hole with it, and
(e) removing the first conductor film outside the hole by ion assist dry etching in an oxygen-containing gas atmosphere, thereby forming, inside of the hole, a capacitor electrode which has the first conductor film and is to be electrically connected with the first plug.
37. A manufacturing method of a semiconductor integrated circuit device according to claim 36, wherein the first conductor film is a conductor film containing ruthenium or osmium as a principal component.
38. A manufacturing method of a semiconductor integrated circuit device as described above in 37, wherein the first conductor film is a conductor film containing ruthenium as a principal component.
39. A manufacturing method of a semiconductor integrated circuit device as described above in 36, wherein the hole having the first conductor film formed therein has an aspect ratio of 12 or greater.
40. A manufacturing method of a semiconductor integrated circuit device as described above in 39, wherein the hole having the first conductor film formed therein has an aspect ratio of 20 or greater.
41. A manufacturing method of a semiconductor integrated circuit device as described above in 40, wherein the hole having the first conductor film formed therein has an aspect ratio of 30 or greater.
42. A manufacturing method of a semiconductor integrated circuit device as described above in 36, wherein the second insulating film is made of a silicon oxide type insulating film and the hole is formed by dry etching with a hard maskxe2x80x94which has been formed over the second insulating film and has a resist-relative selectivity greater than that of the silicon oxide type insulating filmxe2x80x94as an etching mask.
43. A manufacturing method of a semiconductor integrated circuit device as described above in 42, wherein the selectivity of the hard mask relative to a resist is 4 or greater.
44. A manufacturing method of a semiconductor integrated circuit device as described above in 42, wherein the hard mask is made of tungsten.
45. A manufacturing method of a semiconductor integrated circuit device as described above in 39, which further comprises forming a capacitor insulating film over the capacitor electrode after the step (e).
46. A manufacturing method of a semiconductor integrated circuit device as described above in 45, wherein the capacitor insulating film has a dielectric constant less than 50.
47. A manufacturing method of a semiconductor integrated circuit device as described above in 45, wherein the capacitor insulating film is made of a high dielectric substance containing a non-perovskite metal oxide as a principal component.
48. A manufacturing method of a semiconductor integrated circuit device as described above in 47, wherein the non-perovskite metal oxide is tantalum oxide.
49. A manufacturing method of a semiconductor integrated circuit device, which comprises:
(a) forming, over the main surface of a substrate, a first conductor film containing ruthenium or osmium as a principal component and forming, over the first conductor film, a second conductor film containing a double oxide of ruthenium or osmium, and
(b) after formation of a photoresist film over the second conductor film to partially cover it, dry etching a portion of each of the second conductor film and first conductor film not covered with the photoresist film in an zone-containing gas atmosphere, with the photoresist film as an etching mask.
50. A manufacturing method of a semiconductor integrated circuit device as described above in 49, wherein the first conductor film is a conductor film containing ruthenium as a principal component.
51. A manufacturing method of a semiconductor integrated circuit device as described above in 49, wherein the first conductor film is dry etched at a substrate temperature of 25xc2x0 C. or greater but not greater than 150xc2x0 C.
52. A manufacturing method of a semiconductor integrated circuit device as described above in 51, wherein the first conductor film is dry etched at a substrate temperature of 25xc2x0 C. or greater but not greater than 110xc2x0 C.
53. A manufacturing method of a semiconductor integrated circuit device as described above in 49, wherein the ozone-containing gas is not exposed to ultraviolet rays.
54. A manufacturing method of a semiconductor integrated circuit device as described above in 1, wherein the first conductor film is dry etched at a selectivity of 20 or greater relative to a resist.
55. A manufacturing method of a semiconductor integrated circuit device as described above in 54, wherein the first conductor film is dry etched at a selectivity of 100 or greater relative to a resist.
56. A manufacturing method of a semiconductor integrated circuit device, which comprises:
(a) forming a first insulating film over the main surface of a substrate,
(b) after formation of a first connecting hole in the first insulating film, forming a first plug made of a silicon conductor film inside of the first connecting hole, (c) after formation of a second insulating film over the first insulating film, forming a hole in the second insulating film over the first connecting hole, thereby exposing the surface of the first plug from the bottom of the hole,
(d) forming a first conductor film containing ruthenium or osmium as a principal component over the second insulating film including the inside of the hole,
(e) heat treating the substrate to form a conductor layer made of ruthenium silicide or osmium silicide on the interface between the first plug and the first conductor film thereover, and
(f) removing the first conductor film inside of the hole and over the second insulating film by dry etching in an ozone-containing gas atmosphere.
57. A manufacturing method of a semiconductor integrated circuit device as described above in 56, wherein the first conductor film is a conductor film containing ruthenium as a principal component.
58. A manufacturing method of a semiconductor integrated circuit device as described above in 56, wherein the first conductor film is dry etched by isotropic dry etching.
59. A manufacturing method of a semiconductor integrated circuit device as described above in 56, wherein the first conductor film is dry etched by non-plasma type dry etching.
60. A manufacturing method of a semiconductor integrated circuit device as described above in 56, wherein the first conductor film is dry etched at a temperature permitting the etching rate of the first conductor film to exceed an oxidation-induced film-thickness increasing rate.
61. A manufacturing method of a semiconductor integrated circuit device as described above in 56, wherein the first conductor film is dry etched at the substrate temperature of 25xc2x0 C. or greater but not greater than 150xc2x0 C.
62. A manufacturing method of a semiconductor integrated circuit device as described above in 61, wherein the first conductor film is dry etched at the substrate temperature of 25xc2x0 C. or greater but not greater than 110xc2x0 C.
63. A manufacturing method of a semiconductor integrated circuit device as described above in 56, wherein the ozone-containing gas is not exposed to ultraviolet rays.